(1) Field of the Invention
The invention relates generally to electronic circuits for higher voltages and in particular to half-bridge interface and driver circuits or interfaces realized with integrated-circuit technologies.
(2) Description of the Prior Art
Particularly designed special interface and driver circuits in electronic applications are required, when it comes to handling higher power and voltage levels within half-bridge driver control circuits for lights, motors and other types of actuators. This is a noted and quite common requirement for such electronic circuits very frequently employed in the home appliances and automotive industries; for example for lighting purposes, for drives in washing machines, for engine fan control, for electric power assisted steering, or for wiper and seat positioning systems and so on Therefore the handling of higher voltage levels is an elementary demand. The specific and eligible circuits for these applications are so-called half-bridge branches and full-bridge or H-bridge circuits normally used in single or triple phase configurations. The H-bridge designation vividly depicts the arrangement of the four utilized field effect switching transistors. Said circuits are generally operating together with so-called low-side or bottom and high-side or top control and gate driver interfaces.
Realizations of the prior art for such driver circuits are often implemented as specifically tailored semiconductor circuits, fulfilling the operational demands regarding the higher voltages and the elevated power requirements. Therefore, when a higher voltage handling and mastery is obligatory sometimes DMOS (Double diffused Metal Oxide Semiconductor) transistor devices are used, making necessary an expensive process in semiconductor fabrication. Alternatively specialized integrated circuits incorporating CMOS (Complementary MOS) devices with extended drain realizations are employed, which leads also to more expensive components. Another solution is the choice of discrete high-voltage transistor or thyristor devices fabricated with e.g. IGBT (Insulated Gate Bipolar Transistor) technologies or VMESH (Vertical MESHed transistor arrays). Furthermore these driver circuits have to be interconnected with some logic circuitry, which is controlling the overall operation of the driven electrical devices. These logic circuits or even microprocessor systems normally are working with low voltages. The cooperation within these two voltage domainsxe2x80x94one for higher, the other for lower voltagesxe2x80x94has to be realized. Thereto an appropriately combined semiconductor technology capable of handling all these demands is chosen, which most often leads to costly solutions.
Referring now to FIGS. 1A prior art, 1B prior art, 1C prior art, and 1D prior art, the description of a circuit in prior art integrated circuit (1C) realization of said half-bridge is given. The so-called half-bridge is made up of two NMOS (N-channel MOS) transistors, named High-Side (HS) and Low-Side (LS) transistors, which are the only external components in this implementation, and which are shown as externally separated by the waved line in the drawing from the internal parts of the IC described here, all arranged to the left of this line. The HS-transistor is connected at one side to the main high voltage supply (400V) and at its other side to the output or Mid-Point (MP) terminal of said half-bridge. From there the connection is carried on to one side of the LS-transistor, which in turn is leading via its other side to the ground terminal of the circuit. These two transistors are forming one branch of a bridge structure, the other branch being of identical formation and the load balance in the full bridge being achievable or established between the two mid-points respectively. The gates of each of the two transistors in said half-bridge branch are controlled and driven by corresponding gate driver circuit blocks, named HS-Driver and LS-Driver respectively (shown with dashed outlines in the drawing). These driver circuits are differing from each other in such a way, that the HS-Driver includes a data storing means (e.g. an RSxe2x80x94flip-flop), for memorizing the information pertaining to the on-off status of the HS-transistor of the branch. This allows for controlling the HS-Driver circuit with short on-off impulses HSOn and HSOff (see FIG. 1B prior art) via the two level shifting field effect transistors FETS and FETR. This voltage level translation is necessary, because the potential of the reference pinxe2x80x94which is connected to the mid-point (MP) with voltage UOutxe2x80x94of the HS-Driver block is elevated to the high voltage level (400V), when the HS-transistor is closed. The short controlling impulses are advantageous, because they allow for a simpler since less powerful and therefore cheaper implementation of the level shifting high-voltage transistors FETS and FETR, which have to exhibit a high UDS break-through voltage, withstanding the maximum occurring potential shift value. A current technology for e.g. 500V as needed here, exhibits therefore a 2-3 xcexcm oxide sheet strength. The LS-Driver circuit does not need such precautions; the reference potential of which is never rising because of its permanent tie to ground. The control signal LS may therefore be a direct image of the LS-transistor on-off state and thus of the voltage curve for the mid-point voltage UOut. It should be understood, that this prior art solution for the engineering task and its circuit is only one possible example, there are many other solutions not discussed here. Nevertheless they altogether contain means for the level translation problem.
Looking now at FIG. 1B prior art the aforementioned characteristics of the control signals HSOn and HSOff together with signal LS are depicted, governing the behavior of the mid-point voltage UOut.
Referring now to FIGS. 1C prior art and 1D prior art, two possible circuits for the creation of the auxiliary supply voltage USupply (e.g.+12V) for the two driver circuits in FIG. 1B prior art are given. The first circuit (FIG. 1D prior art) to be explained is a simple Zener-diode (ZD) stabilized voltage generation (derived from the pulsed DC voltage UDC) circuit with a resistor R (for high voltage to current conversion) and a capacitor C (for energy storage). However here the current, that can be drawn from this standard circuit is limited to very low values (appr. 1 mA), due to the high internal resistance of the circuit. The second circuit (FIG. 1C prior art) should overcome this limitation and could be described as a two-way rectifying diode network, its internal resistance being parameterizable to much lower values. The usable current (also derived from a pulsed DC voltage, here UOut at the mid-point MP of a half-bridge) may then be increased to several 10 mA. The function of the coil Lext is to simply limit the inrush current into the capacitor Cext.
Amongst the prior art solutions more elaborate voltage shifter or voltage translation circuits can be found, as well as potential level isolating solutions with e.g. transformers or optical couplers. It is therefore a challenge for the designer of such circuits to achieve a high-quality, but lower-cost solution.
There are various patents referring to such solutions.
U.S. Pat. No. RE36,480 (to Bourgeois, et al.) describes a control and monitoring device for a power switch, one terminal of which is at a floating reference voltage. The circuit comprises a level translating portion, which is designed to transmit, from another control circuit, orders to the power switch control circuit, or conversely, to receive monitoring information.
U.S. Pat. No. 6,151,233 (to Kondo) discloses a synchronous rectifier circuit. In a switching power circuit adopting this synchronous rectifying system, when a first switch is cut-off, current IL of an inducing element is maintained by a commutating diode, and the inducing element releases energy which was stored in the conduction period of the first switch. A second switch connected in parallel to the commutating diode is made conducting so as not to overlapp with the conduction period of the first switch. In the conduction period of the second switch, the current IL does not flow through the commutating diode, and it is possible to prevent lowering of efficiency caused by forward voltage drop. An inducing element current detecting circuit monitors the current IL and, when the current IL is reversing its direction, instructs a control circuit to cut-off the second switch. As a result, no reverse current flows through the inducing element even when the load is small, thus realizing a switching power circuit always having high efficiency.
U.S. Pat. No. 6,184,716 (to Depetro et al.) describes a high-voltage final output stage for driving an electric load, of the type which comprises a complementary pair of transistors connected between first and second supply voltage references, and at least one PMOS pull-up transistor connected in series with an NMOS pull-down transistor. The stage comprises an additional PMOS transistor connected in parallel with the pull-up transistor and having the body terminal in common therewith. More particularly, the body terminals of both PMOS transistors are formed in the semiconductor within a common well which can withstand high voltages, and the additional transistor is a thick oxide PMOS power transistor.
U.S. Pat. No. 6,445,623 (to Zhang, et al.) describes charge pumps with current sources for regulation. A charge pump circuit is provided for reducing the voltage ripple and EMI associated with prior art circuits. The charge pump circuit is configured with at least one current source for suitably controlling the charging and/or discharging current in the charge pump capacitors. The currents of the current sources are determined by the load current requirements, rather than the on-resistance of any switches or the ESR of any capacitors, thus allowing a significant reduction of the peak current drawn from the power supply as well as the peak current injected into the output reservoir capacitor. The charge pump circuit can be configured with a current source in series with the input supply voltage to control the total current in the charge pump. In addition, the charge pump circuit can be configured with current limited switches for controlling the total current. For example, current sources can be suitably configured to replace one or more switches in the charge pump circuit to effectively control the total current in the charge pump circuit. By feeding the charge pump capacitors with switched current sources, the voltage across the current sources can be suitably limited to the supply voltage or the output voltage. In addition, the current sources can operate as resistor devices with adjustable impedances, and be configured to suitably reduce or eliminate the excessive supply voltage across the current sources. Further, the switched current sources can comprise various current mirror configurations. As a result, the requirement for the breakdown voltage can be significantly reduced. In addition, through use of a low voltage process, the cost and packaging size can be suitably reduced.
A principal object of the present invention is to provide an effective and very producible method and circuit as design principle for supplying potential-elevated circuit blocks i.e. circuit blocks floating at higher voltage levels with supply energy.
Another further object of the present invention is to apply these circuits and methods as design principle with monolithic integrated circuit technology without the need for using integrated high-voltage components.
Another still further object of the present invention is to reach an application of this principle with half-bridge circuits.
A still further object of the present invention is to reduce the power consumption of the circuit by realizing inherent appropriate design features.
Another object of this invention is its producibility as a monolithic semiconductor integrated circuit.
Also an object of the present invention is to reduce the cost of manufacturing by implementing the circuit as a monolithic integrated circuit in low cost CMOS technology.
Also another object of the present invention is to reduce cost by effectively minimizing the number of expensive components.
In accordance with the objects of this invention, a method for controlling and driving external higher voltage switching devices, such as transistors, thyristors or triacs e.g. which are configured as a half-bridge circuit branch, i.e. forming an output voltage terminal as mid-point between a high-side and a low-side switch, both connected in series between a main supply voltage terminal, furnishing the main supply energy and a ground terminal respectively is given. Said method includes providing low-side and high-side switching devices, for each switching device an attached integrated controller circuit containing four internal switches arranged as two pairs, providing means for generating, processing and storing as well as transmitting/receiving information data, means for transferring information, means for a potential separation and isolation of said means for transferring information, storage means for said main supply energy, a first storage means for low-side auxiliary supply energy, a second storage means for high-side auxiliary supply energy. Further serves this method for arranging said external low-side switching device and said external high-side switching device in serial connection between said given power or high-side terminal and said ground or low-side terminal of the circuit, used for feeding input of said available main supply energy, thus creating said mid-point terminal for said output voltage between said two respectively attached high-side and low-side external switching devices. It is also needed for associating to said external low-side switching device said integrated low-side controller circuit together with an individually controlled and regulated low-side appliance for its required low-side auxiliary energy supply as said, altogether named master controller circuit and associating to said external high-side switching device said integrated high-side controller circuit together with an individually controlled and regulated high-side appliance for its required high-side auxiliary energy supply as said, altogether named slave controller circuit. Also included in that method is assigning said main supply energy to said storage means, placed between and connected to said integrated master controller circuit and said integrated slave controller circuit as well as assigning said low-side auxiliary supply energy to said first storage means, connected to said integrated master controller circuit and assigning said high-side auxiliary supply energy to said second storage means, connected to said integrated slave controller circuit. Equally includes that method collocating the transporting and controlling of said main energy as well as said individually regulated low-side and high-side auxiliary supply energies to said two pairs of internal low-side and high-side switches, internal to said integrated low-side and high-side controller circuits. Also included in that method is collocating the generating, processing, and storing of said information data to said integrated low-side and said integrated high-side controller circuits for the purpose of control and regulation of each of said supply energies and collocating for the transferring and/or exchanging of said information data with said isolating internal potential separation said means for transferring information between said master controller circuit and said slave controller circuit. Furtheron is needed in that method starting-up an initial bootstrap procedure for controlling and regulating said available main supply energy with said external switching devices; together with generating said low-side and high-side auxiliary supply energies for said master controller and said slave controller circuits, generating, processing, and storing said information data, within said two integrated master and slave controller circuits for the purpose of transportation, control and regulation of said main supply energy and said first and said second auxiliary supply energies in order to solve the required control task; setting-up and following a four segment time slot scheme; realizing said controlling of said four internal low-side and high-side switches with the help of said master and slave controller circuits and implementing said driving of said master and slave controller circuits using said generated information data within the rules of said time slot scheme. Said method also comprises preparing transfer and/or exchange of said information data by transmitting/receiving said information data with said means for transferring information within and between said integrated master and slave controller circuits; preparing said means for transmitting/receiving said information data as said means for transferring information within said integrated master controller circuit and preparing said means for receiving/transmitting said information data as said means for transferring information within said integrated slave controller circuit. Said method comprehends also setting-up the controlling and driving of said external low-side and said external high-side switching devices with the help of said master and said slave controller circuits using said information data; controlling and driving said low-side switching device with the help of said integrated master controller circuit; controlling and driving said high-side switching device with the help of said integrated slave controller circuit; transferring and/or exchanging said information data between said integrated master and said integrated slave controller circuits with said means for transferring information; transmitting/receiving said information data with said means for transferring information at said integrated master controller circuit and receiving/transmitting said information data with said means for transferring information at said integrated slave controller circuit. Furtheron is implied transporting and storing said energies between and in said storage devices with the help of said four internal switches; and at the same time controlling and regulating said stored auxiliary supply energies within the framework of said time slot scheme. Also implied in said method is transporting during the first time segment of said time slot scheme a controlled amount of said main supply energy into said means for storing said main supply energy and into said means for storing said low-side auxiliary supply energy; storing said controlled amount of said main supply energy into said storage means for said main supply energy; storing said controlled amount of said low-side auxiliary supply energy for said integrated master controller circuit into said first storage means; transporting during the second time segment of said time slot scheme a controlled amount from said stored main supply energy into said means for storing said high-side auxiliary supply energy; storing said controlled amount of said high-side auxiliary supply energy for said integrated slave controller circuit into said second storage means; transporting during the third time segment of said time slot scheme a controlled amount of said main supply energy into said means for storing said main supply energy; storing said controlled amount of main supply energy into said storage means for said main supply energy; transporting during the fourth time segment of said time slot scheme a controlled amount of said main supply energy to ground, thus reducing said main supply energy; and keeping the remainder of said main supply energy stored in said storage means for said main supply energy. Also contained in said method is controlling of said stored low-side and said stored high-side auxiliary supply energies by regulating its voltages according to the boundary conditions to be kept for the required control solution and controlling of said output voltage at said mid-point terminal by regulating its behavior in such a way, that the required control task for the circuit is properly solved as well as closing the operation loop by getting back to the first step after said initial bootstrap procedure and repeating this loop action permanently during the regular operation of the circuit looping-back operation.
Also in accordance with the objects of this invention, a more general method, for controlling and driving higher voltage switching devices, such as transistors, thyristors or triacs e.g. arranged within a circuit branch in serial connection and thus forming output voltage terminals as mid-points between consecutive switching devices, all connected in series between a main supply voltage terminal furnishing the main supply energy and a ground terminal respectively is established. This general method includes providing more than one of said external switching devices, an integrated master controller circuit, several integrated slave controller circuits and both types of circuits containing internal switches, means for generating, processing, and storing information data, means for transmitting/receiving said information data, means for transferring information; means for potential separation and isolation, storage means for said main supply energy, and several storage means for auxiliary supply energies. Said method specifies arranging said several external switching devices in serial connection between said power terminal of the circuit, feeding input for the available main supply energy and said ground terminal; associating to each of said external switching device its own appropriate controller circuit together with its own, individually controlled and regulated appliance for the required auxiliary energy supply and assigning for said main supply energy and said different supply energies said separate and individual storage means. Also implied in said general method is transporting, controlling and regulating said energies with the help of said internal switches in said integrated master controller circuit and in said several integrated slave controller circuits; generating, processing, and storing information data within said controller circuits for the purpose of control and regulation of each supply energy; transferring and/or exchanging of said information data with a sufficiently isolating internal potential separation as means for transferring information within and between said controller circuits. The general method comprises starting-up an initial bootstrap procedure for controlling and regulating said available main supply energy with said external switching devices together with generating said auxiliary supply energies, as needed for regular operation of said controller circuits; generating, processing, and storing said information data within said controller circuits for the purpose of transportation as well as control and regulation of said every single supply energy, in order to solve the required control task; setting-up and following a multi segment time slot scheme; controlling and driving of said internal switching devices with the help of said controller circuits and said generated information data within the rules of said time slot scheme; and transferring and/or exchanging of said information data by transmitting and receiving said information data with said means for transferring information between said controller circuits. Furtheron needed with said general method is setting-up of the controlling and the driving of said external switching devices with the help of said information data using said controller circuits; transporting and storing said energies between and in said storage devices with the help of said internal switches; controlling and regulating said stored auxiliary supply energies according to the boundary conditions to be kept for the required control solution; synchronizing all that within the framework of said time slot scheme; and at the same time operating regularly in a closed loop of operations.
Also in accordance with the objects of this invention, a circuit, capable of controlling and driving higher voltage switching devices, such as transistors, thyristors or triacs e.g. which are configured as a half-bridge circuit branch, i.e. forming an output voltage terminal as mid-point between a high-side and a low-side switch, both connected in series between a main supply voltage terminal, furnishing the main supply energy and a ground terminal respectively is developed. Said circuit comprises means for controlling and driving said low-side switching device, designated as integrated master controller circuit; means for controlling and driving said high-side switching device, designated as integrated slave controller circuit; means for generating, storing, and processing information data, within said integrated master controller circuit and said integrated slave controller circuit; and means for transmitting and/or receiving information data, within said integrated master controller circuit and said integrated slave controller circuit as well as means for transferring information data, between said integrated master controller circuit and said integrated slave controller circuit. Also contained in said circuit are means for potential separation and isolation of said means for transferring information between said integrated master controller circuit and said integrated slave controller circuit. Finally comprises said circuit means for storing the main supply energy, placed between and connected to said integrated master controller circuit and said integrated slave controller circuit; means for storing the low-side auxiliary supply energy for said integrated master controller circuit; means for storing the high-side auxiliary supply energy for said integrated slave controller circuit; means for transporting said main supply energy into said means for storing said low-side auxiliary supply energy; means for transporting said main supply energy into said means for storing said high-side auxiliary supply energy. Necessary in said circuit are further means for generating, controlling and regulating said low-side and said high-side auxiliary supply energies; and means for starting-up the operation of said means for generating, controlling and regulating said low-side and said high-side auxiliary supply energies during an initial bootstrapping procedure.